Research Foundations of the iPU™ and CALPU™ Architectures

AdaptMicroSys builds on decades of R&D in processor design, bringing breakthrough security, energy efficiency, and adaptability to modern compute platforms.

AdaptMicroSys technologies are built on over 15 years of pioneering research in adaptive execution, hardware/software co-reconfigurability, compiler-integrated optimization, and processor-level security.

The iPU™ and its precursor CALPU™ are rooted in published innovations presented at leading IEEE conferences between 2006–2008.

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🧩 Non-FPGA-Based Field-Programmable Self-Repairable (FPSR) Microarchitecture

**Yong-Kyu Jung, IEEE, 2008**

Introduced a reconfigurable microarchitecture capable of dynamic, on-chip instruction-level repair — laying an early foundation for adaptable systems like CALPU™ and influencing runtime anomaly detection used in iPU.

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⚙️ Fault-Recovery Non-FPGA-Based Adaptable Computing System Design

**Yong-Kyu Jung, IEEE, 2007**

Presented an architecture-level approach to fault-tolerant adaptive computing without relying on FPGA-based logic. This inspired later innovations in compiler-assisted lookahead execution and proactive architectural security.

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🎛️ A Hardware/Software Co-Reconfigurable Multimedia Architecture

**Yong-Kyu Jung, IEEE, 2006**

Introduced hybrid mechanisms for co-reconfiguring hardware and software resources in real time. This formed the foundation of CALPU’s adaptive optimization model — and inspired iPU’s dynamic security reconfiguration.

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🔐 Design and Optimization of a Programmable Instruction Decoder for DSP Architecture

**Yong-Kyu Jung, IEEE, 2007**

Explored programmable instruction decoding techniques for DSP architectures. This directly influenced the iPU’s Machine Language Hopping (MLH) instruction stream transformation model.

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🧠 Design and Implementation of a Co-Reconfigurable Microprocessor for Multimedia and Adaptive Processing

**Yong-Kyu Jung, IEEE, 2006**

Described a co-optimized instruction decoding and functional unit pipeline, which became central to CALPU’s architecture and inspired multi-stage threat mitigation in iPU.

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✅ Summary

The iPU™ architecture is not an isolated development — it stands on a rich foundation of real research, real design, and real engineering validation going back nearly two decades.

The intellectual lineage of CALPU™ and iPU™ continues to evolve toward the needs of secure, energy-efficient, and trusted AI systems.

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